Mobile Semiconductor’s silicon-proven embedded SRAM technology offers optimized TSMC 40nm and 65nm low-power process, single-port SRAM solutions in a range of architectures:
low voltage (LV)
ultra high speed (UHS)
high density (HD)
Mobile Semiconductor’s proprietary design and layout techniques are applied to all architectures to optimize performance while keeping die size small.
Single-port low voltage (LV) memories use high VT devices to minimize leakage currents with limited standard VT devices used when required.
Single-port ultra-high speed (UHS) memories use low VT and standard VT devices to optimize the critical path and enhance performance while limiting static current.
Single-port high density (HD) memories use standard VT and high VT devices to optimize the critical path and enhance performance while limiting static current.
Single-port multi-megabit (MM) memories achieve the highest SRAM block densities with rectangular or L-shaped footprints for flexible SOC floorplanning.
TSMC 40nm LP, TSMC 65nm LP
Mobile Semiconductor’s optimized TSMC LP-process embedded single-port SRAM solutions are offered in low voltage (LV), ultra high speed (UHS), high density (HD) and multi-megabit (MM) architectures.
To ensure high manufacturing yield, the Trailblaze™ software utilizes TSMC’s standard high density 6T bit cells and is consistent with TSMC’s Design for Manufacturing (DFM) guidelines for the LP processes.
Mobile Semiconductor Optimized TSMC LP Architecture
40nm Single-Port, Low Voltage
40nm Single-Port, Ultra High Speed
40nm Single-Port, High Density
40nm Single-Port, Multi-Megabit
65nm Single-Port, Low Voltage
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